<div>Ideal candidate will have:<br /> -3 to 10+ years of &nbsp;experience in RTL design, Integration, Linting tools, CDC tools and UPF<br /> -Good experience in synthesis using DC and Simulation using Modelsim, VCS etc.<br /> -Good experience in Prime time STA<br /> -Good knowledge in writing SV assertions and code coverage</div> <div>-Good communication skills<br /> -Ability to work well within a team and with other teams</div>