RTL Design Engineer

Company Overview

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Job Summary

The RTL Design Engineer is responsible for designing and implementing register-transfer level (RTL) designs. This role expects the candidate to engage in synthesis, linting, and clock domain crossing (CDC) activities, contributing to the development of high-performance digital circuits and systems.

Responsibilities

• Design RTL for digital circuits and systems to meet specified performance metrics.
• Perform synthesis of RTL designs to optimize for area, speed, and power.
• Utilize linting tools to ensure code quality and adherence to design guidelines.
• Implement and verify clock domain crossing (CDC) techniques to prevent data corruption.
• Collaborate with cross-functional teams to integrate designs into larger systems.
• Conduct design reviews and participate in troubleshooting of design-related issues.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum of 2.5 years of experience in RTL design and digital circuit design.
• Strong understanding of synthesis tools and techniques.
• Familiarity with linting tools for design verification.
• Experience with clock domain crossing (CDC) methodologies.
• Proficient in HDL (Hardware Description Language) such as VHDL or Verilog.
• Knowledge of digital design principles and debugging techniques.

Preferred Skills

• Experience with timing analysis and optimization.
• Familiarity with FPGA and ASIC design flows.
• Knowledge of verification methodologies and tools.

Experience

• Minimum of 2.5 years of relevant experience in RTL design.

Environment

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Salary

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Growth Opportunities

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Benefits

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